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tm mm74hct540, inverting octal 3-state buffer mm74hct541, octal 3-state buffer j une 2007 ?984 fairchild semiconductor corporation www.fairchildsemi.com mm74hct540, mm74hct541 rev. 1.3 mm74hct540, inverting octal 3-state buffer mm74hct541, octal 3-state buffer features ttl input compatible typical propagation delay: 12ns 3-state outputs for connection to system buses low quiescent current: 80? output current: 6ma (min.) general description the mm74hct540 and mm74hct541 3-state buffers utilize advanced silicon-gate cmos technology and are general purpose high speed inverting and non-inverting buffers. they possess high drive current outputs which enable high speed operation even when driving large bus capacitances. these circuits achieve speeds com- parable to low power schottky devices, while retaining the low power consumption of cmos. both devices are ttl input compatible and have a fanout of 15 ls-ttl equivalent inputs. mm74hct devices are intended to interface between ttl and nmos components and standard cmos devices. these parts are also plug-in replacements for ls-ttl devices and can be used to reduce power con- sumption in existing designs. the mm74hct540 is an inverting buffer and the mm74hct541 is a non-inverting buffer. the 3-state control gate operates as a two-input nor such that if either g1 or g2 are high, all eight outputs are in the high-impedance state. in order to enhance pc board layout, the mm74hct540 and mm74hct541 offers a pinout having inputs and outputs on opposite sides of the package. all inputs are protected from damage due to static discharge by diodes to v cc and ground. ordering information devices also available in tape and reel. specify by appending the suffix letter ??to the ordering number. order number package number package description mm74hct540wm m20b 20-lead small outline integrated circuit (soic), jedec ms-013, 0.300" wide mm74hct540sj m20d 20-lead small outline package (sop), eiaj type ii, 5.3mm wide MM74HCT540MTC mtc20 20-lead thin shrink small outline package (tssop), jedec mo-153, 4.4mm wide mm74hct541wm m20b 20-lead small outline integrated circuit (soic), jedec ms-013, 0.300" wide mm74hct541sj m20d 20-lead small outline package (sop), eiaj type ii, 5.3mm wide mm74hct541mtc mtc20 20-lead thin shrink small outline package (tssop), jedec mo-153, 4.4mm wide mm74hct541n n20a 20-lead plastic dual-in-line package (pdip), jedec ms-001, 0.300" wide
mm74hct540, inverting octal 3-state buffer mm74hct541, octal 3-state buffer ?984 fairchild semiconductor corporation www.fairchildsemi.com rev. 1.3 2 connection diagrams pin assignments for dip, soic, sop and tssop top view, mm74hct540 top view, mm74hct541
mm74hct540, inverting octal 3-state buffer mm74hct541, octal 3-state buffer ?984 fairchild semiconductor corporation www.fairchildsemi.com rev. 1.3 3 absolute maximum ratings (1) stresses exceeding the absolute maximum ratings may damage the device. the device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. in addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. note: 1. unless otherwise specified all voltages are referenced to ground. 2. power dissipation temperature derating ?plastic ??package: ?2mw/? from 65? to 85?. recommended operating conditions the recommended operating conditions table defines the conditions for actual device operation. recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. fairchild does not recommend exceeding them or designing to absolute maximum ratings. symbol parameter rating v cc supply voltage ?.5 to +7.0v v in dc input voltage ?.5 to v cc +1.5v v out dc output voltage ?.5 to v cc +0.5v i ik , i ok clamp diode current ?0ma i out dc output current, per pin ?5ma i cc dc v cc or gnd current, per pin ?0ma t stg storage temperature range ?5? to +150? p d po w er dissipation note 2 s. o. package only 600mw 500mw t l lead temperature (soldering 10 seconds) 260? symbol parameter min. max. units v cc supply voltage 4.5 5.5 v v in , v out dc input or output voltage 0 v cc v t a operating temperature range ?0 +85 ? t r , t f input rise and fall times 500 ns
mm74hct540, inverting octal 3-state buffer mm74hct541, octal 3-state buffer ?984 fairchild semiconductor corporation www.fairchildsemi.com rev. 1.3 4 dc electrical characteristics v cc = 5v ?10% (unless otherwise specified) note: 3. measured per input. all other inputs at v cc or gnd. symbol parameter conditions t a = 25? t a = ?0 to 85? t a = ?5 to 125? units t yp. guaranteed limits v ih minimum high level input voltage 2.0 2.0 2.0 v v il maximum low level input voltage 0.8 0.8 0.8 v v oh minimum high level output v oltage v in = v ih or v il : v |i out | = 20? v cc v cc ?0.1 v cc ?0.1 v cc ?0.1 |i out | = 6.0ma, v cc = 4.5v 4.2 3.98 3.84 3.7 |i out | = 7.2ma, v cc = 5.5v 5.2 4.98 4.84 4.7 v ol maximum low level voltage v in = v ih or v il : v |i out | = 20? 0 0.1 0.1 0.1 |i out | = 6.0ma, v cc = 4.5v 0.2 0.26 0.33 0.4 |i out | = 7.2ma, v cc = 5.5v 0.2 0.26 0.33 0.4 i in maximum input current v in = v cc or gnd ?.1 ?.0 ?.0 ? i oz maximum 3-state output leakage current v out = v cc or gnd, g = v ih ?.5 ?.0 ?0 ? i cc maximum quiescent supply current v in = v cc or gnd, i out = 0? 8.0 80 160 ? v in = 2.4v or 0.5v (3) 0.6 1.0 1.3 1.5 ma
mm74hct540, inverting octal 3-state buffer mm74hct541, octal 3-state buffer ?984 fairchild semiconductor corporation www.fairchildsemi.com rev. 1.3 5 ac electrical characteristics mm74hct540: v cc = 5.0v, t r = t f = 6ns, t a = 25?, (unless otherwise specified). ac electrical characteristics mm74hct540: v cc = 5.0v ?0%, t r = t f = 6ns (unless otherwise specified). note: 4. c pd determines the no load dynamic power consumption, p d = c pd v cc 2 f + i cc v cc , and the no load dynamic current consumption, i s = c pd v cc f + i cc . symbol parameter conditions typ. guaranteed limits units t phl , t plh maximum output propagation delay c l = 45pf 12 18 ns t pzl , t pzh maximum output enable time c l = 45pf, r l = 1k ? 14 28 ns t plz , t phz maximum output disable time c l = 5pf, r l = 1k ? 13 25 ns symbol parameter conditions t a = 25? t a = ?0 to 85? t a = ?5 to 125? units t yp. guaranteed limits t phl , t plh maximum output propagation delay c l = 50pf 12 20 25 30 ns c l = 150pf 22 30 38 45 t pzh , t pzl maximum output enable time r l = 1k ? c l = 50pf 15 30 38 45 ns c l = 150pf 20 40 50 60 t phz , t plz maximum output disable time r l = 1k ? , c l = 50pf 15 30 38 45 ns t thl , t tlh maximum output rise and fall time c l = 50pf 6 12 15 18 ns c in maximum input capacitance 510 10 10 pf c out maximum output capacitance 15 20 20 20 pf c pd po w er dissipation capacitance (4) (per output) g = v cc 12 pf g = gnd 50
mm74hct540, inverting octal 3-state buffer mm74hct541, octal 3-state buffer ?984 fairchild semiconductor corporation www.fairchildsemi.com rev. 1.3 6 ac electrical characteristics mm74hct541: v cc = 5.0v, t r = t f = 6ns, t a = 25?, (unless otherwise specified). ac electrical characteristics mm74hct541: v cc = 5.0v ?10%, t r = t f = 6ns (unless otherwise specified). note: 5. c pd determines the no load dynamic power consumption, p d = c pd v cc 2 f + i cc v cc , and the no load dynamic current consumption, i s = c pd v cc f + i cc . symbol parameter conditions typ. guaranteed limits units t phl , t plh maximum output propagation delay c l = 45pf 13 20 ns t pzl , t pzh maximum output enable time c l = 45pf, r l = 1k ? 17 28 ns t plz , t phz maximum output disable time c l = 5pf, r l = 1k ? 15 25 ns symbol parameter conditions t a = 25? t a = ?0 to 85? t a = ?5 to 125? units t yp. guaranteed limits t phl , t plh maximum output propagation delay c l = 50pf 14 23 29 34 ns c l = 150pf 17 33 42 49 t pzh , t pzl maximum output enable time r l = 1k ? c l = 50pf 17 30 38 45 ns c l = 150pf 22 40 50 60 t phz , t plz maximum output disable time r l = 1k ? , c l = 50pf 17 30 38 45 ns t thl , t tlh maximum output rise and fall time c l = 50pf 6 12 15 18 ns c in maximum input capacitance 510 10 10 pf c out maximum output capacitance 15 20 20 20 pf c pd po w er dissipation capacitance (5) (per output) g = v cc 12 pf g = gnd 45
mm74hct540, inverting octal 3-state buffer mm74hct541, octal 3-state buffer ?984 fairchild semiconductor corporation www.fairchildsemi.com rev. 1.3 7 physical dimensions dimensions are in inches (millimeters) unless otherwise noted. figure 1. 20-lead small outline integrated circuit (soic), jedec ms-013, 0.300" wide pa ck ag e number m20b
mm74hct540, inverting octal 3-state buffer mm74hct541, octal 3-state buffer ?984 fairchild semiconductor corporation www.fairchildsemi.com rev. 1.3 8 physical dimensions (continued) dimensions are in millimeters unless otherwise noted. figure 2. 20-lead small outline package (sop), eiaj type ii, 5.3mm wide pa ck ag e number m20d
mm74hct540, inverting octal 3-state buffer mm74hct541, octal 3-state buffer ?984 fairchild semiconductor corporation www.fairchildsemi.com rev. 1.3 9 physical dimensions (continued) dimensions are in millimeters unless otherwise noted. figure 3. 20-lead thin shrink small outline package (tssop), jedec mo-153, 4.4mm wide pa ck ag e number mtc20
mm74hct540, inverting octal 3-state buffer mm74hct541, octal 3-state buffer ?984 fairchild semiconductor corporation www.fairchildsemi.com rev. 1.3 10 physical dimensions (continued) dimensions are in inches (millimeters) unless otherwise noted. figure 4. 20-lead plastic dual-in-line package (pdip), jedec ms-001, 0.300" wide pa ck ag e number n20a
mm74hct540, inverting octal 3-state buffer mm74hct541, octal 3-state buffer ?984 fairchild semiconductor corporation www.fairchildsemi.com rev. 1.3 11 rev. i28 trademarks the following are registered and unregistered trademarks and service marks fairchild semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function, or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. these specifications do not expand the terms of fairchild? worldwide terms and conditions, specifically the warranty therein, which covers these products. life support policy fairchild? products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms acex build it now coreplus crossvolt ctl current transfer logic ecospark fact quiet series fact fast fastvcore fps frfet global power resource sm green fps green fps e-series gto i-lo intellimax isoplanar megabuck microcoupler micropak motion-spm optologic optoplanar pdp-spm power220 power247 poweredge power-spm powertrench programmable active droop qfet qs qt optoelectronics quiet series rapidconfigure smart start spm stealth superfet supersot-3 supersot-6 supersot-8 syncfet the power franchise tinyboost tinybuck tinylogic tinyopto tinypower tinypwm tinywire serdes uhc unifet vcx datasheet identi?ation product status de?ition advance information formative or in design this datasheet contains the design speci?ations for product development. speci?ations may change in any manner without notice. preliminary first production this datasheet contains preliminary data; supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice to improve design. no identi?ation needed full production this datasheet contains ?al speci?ations. fairchild semiconductor reserves the right to make changes at any time without notice to improve design. obsolete not in production this datasheet contains speci?ations on a product that has been discontinued by fairchild semiconductor. the datasheet is printed for reference information only.

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